BCR Port Access

From Ron Wiesen:

The BCR interface in input has only a single bit of input and no output capabilities.

The BCR input signal is connected to two places within the laptop: at I/O Port 179 where it appears at bit position 3, and at the 8085C CPU where it appears at the RST5.5 interrupt request signal input pin.

The BCR input appearance at the RST5.5 interrupt request signal input pin of the 8085C CPU can generate an interrupt, and its state can be read using the RIM instruction.

Executing RIM will copy the interrupt mask to the "A" register. The mask allows/prevents generation of an interrupt due to the BCR input.

However, executing the RIM instruction also copies the state of the RST5.5 interrupt request signal (as well as the RST6.5 and RST7.5 interrupt request signals) to the "A" register, and this also is relevant to the BCR input.

Executing the RIM instruction copies the state of the RST5.5 interrupt request signal (i.e., the state of BCR input) to the "A" register where it will be deposited at bit position 4.

As I understand it, the BCR drivers (i.e., the Tandy provided discriminator software) unmask the the RST5.5 interrupt request signal and, upon a subsequent generation of the RST5.5 interrupt, are invoked by the interrupt. Upon an invocation, the BCR drivers repeatedly use the IN instruction to inspect the BCR input appearance at bit position 3 of I/O Port 179 while measuring the duration of its two sustained states in order to ascertain whether the Wand is passing over a thin Bar code line or a think Bar code line.